Product Summary

The CY2305SXI-1HT is a Low Cost 3.3-V Zero Delay Buffer. The CY2305SXI-1HT accepts one reference input, and drives out five low skew clocks. The -1H versions of each device operate at up to 100-/133 MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2305SXI-1HT is available in two or three different configurations.

Parametrics

CY2305SXI-1HT absolute maximum ratings: (1)Supply voltage to ground potential: –0.5 V to +7.0 V; (2)DC input voltage (Except REF): –0.5 V to VDD + 0.5 V; (3)DC input voltage REF: –0.5 V to 7 V; (4)Storage temperature: –65℃ to +150℃; (5)Junction temperature: 150℃; (6)Static discharge voltage(per MIL-STD-883, Method 3015: > 2,000 V.

Features

CY2305SXI-1HT features: (1)10 MHz to 100/133 MHz operating range, compatible with CPU and PCI bus frequencies; (2)Zero input-output propagation delay; (3)60-ps typical cycle-to-cycle jitter (high drive); (4)Multiple low skew outputs; (5)Compatible with Pentium-based systems; (6)Packages: 8-pin, 150-mil SOIC package; (7)3.3-V operation; (8)Commercial and industrial temperature ranges.

Diagrams

CY2305SXI-1HT block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
CY2305SXI-1HT
CY2305SXI-1HT

Cypress Semiconductor

Phase Locked Loops (PLL) 3.3VZDB IND

Data Sheet

0-1860: $1.66
1860-2000: $1.60
2000-2500: $1.60
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
CY2300
CY2300

Other


Data Sheet

Negotiable 
CY2300SXC
CY2300SXC

Cypress Semiconductor

Phase Locked Loops (PLL) 3.3VZDB COM

Data Sheet

0-1: $4.99
1-25: $4.31
25-100: $4.08
100-250: $3.40
CY2300SXCT
CY2300SXCT

Cypress Semiconductor

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Data Sheet

0-1853: $3.10
1853-2000: $2.99
2000-2500: $2.99
CY2302
CY2302

Other


Data Sheet

Negotiable 
CY23020-1
CY23020-1

Other


Data Sheet

Negotiable 
CY23020LFI-3
CY23020LFI-3

Cypress Semiconductor

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Data Sheet

Negotiable