XC4028EX-4PG299I

Product Summary

The XC4028EX-4PG299I is a Field Programmable Gate Array. It is implemented with a regular, flexible, programmable architecture of Configurable Logic Blocks (CLBs), interconnected by a powerful hierarchy of versatile routing resources, and surrounded by a perimeter of programmable Input/Output Blocks (IOBs). The XC4028EX-4PG299I has generous routing resources to accommodate the most complex interconnect patterns. The XC4028EX-4PG299I is customized by loading configuration data into internal memory cells. The FPGA can either actively read its configuration data from an external serial or byte-parallel PROM (master modes), or the configuration data can be written into the FPGA from an external device (slave and peripheral modes). XC4028EX-4PG299I FPGA is supported by powerful and sophisticated software, covering every aspect of design from schematic or behavioral entry, floor planning, simulation, automatic block placement and routing of interconnects, to the creation, downloading, and readback of the configuration bit stream.

Parametrics

XC4028EX-4PG299I specifications: (1)Maximum Toggle Rate=143M; (2)V(OL)Max.(V)Lo Level Out.Volt.=0.4; (3)@Iol (A)=12m; (4)V(OH)Min.(V)Hi Level Out.Volt.=2.4; (5)@IOH (test)=4.0m; (6)VIH Min. (TTL) (V)=2.0; (7)VIL Max. (TTL) (V)=0.8; (8)VIH Min. (CMOS) (V)=3.5; (9)VIL Max. (CMOS) (V)=1.0; (10)Vsup (+) Maximum (V)=7.5; (11)Digital Input V Max (V)=7.5; (12)Vsup(+) Nom.(V) Pos.Sup.Volt.=5.0.

Features

XC4028EX-4PG299I features: (1)Fully PCI compliant (speed grades -2 and faster); (2)Abundant flip-flops; (3)Flexible function generators; (4)Dedicated high-speed carry logic; (5)Wide edge decoders on each edge; (6)Hierarchy of interconnect lines; (7)Internal 3-state bus capability; (8)Eight global low-skew clock or signal distribution networks; (9)System Performance beyond 80 MHz; (10)Flexible Array Architecture; (11)Low Power Segmented Routing Architecture; (12)Backward Compatible with XC4000 Devices.

Diagrams